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1.6

OEMAddresstable只是用來初始化一級頁表，就是所謂的段（section）描述，每個段是1MB，分為4096個段，總共4G——虛擬內(nèi)存空間4G就是由此而來。
并且這個OEMAddresstable可以用在查表法中用來轉換虛擬地址、物理地址（相互轉換都可以）。

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PTs(pointer to section)的相關定義如下：

;?? Define RAM space for the Page Tables:

;

PHYBASE???????? EQU???????????? 0x30000000 ? ; physical start

PTs?????????????? EQU???????????? 0x30010000 ? ; 1st level page table address (PHYBASE + 0x10000)

PTs保存在物理內(nèi)存中的地址是0x30010000 ，上圖的301行的0x2000是什么意義呢？我們知道沒有緩存的虛擬地址起始地址是0x80000000，那這個虛擬地址對應的物理地址是多少呢？根據(jù)VA映射到PA的規(guī)則，見下圖：

從0x80000000中取出[31:20]位，也即0x800來左移2位之后(0x2000，這個就是上面這個值的來由)加上translation base(在這里是PTs)，也即上圖add?????? r10, r10, #0x2000這行語句的意義，執(zhí)行這行語句之后r0=0x30012000，這就是計算了4G虛擬地址空間中從0x80000000地址開始的虛擬地址對應的物理起始地址是0x30012000，也就是section base address=0x30012000。

PTE：pointer to enter

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接下來

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我們知道r1指向g_oalAddressTable，假如g_oalAddressTable的定義如下：

g_oalAddressTable

?????? [ {TRUE}

??????? DCD???? 0x80000000, 0x30000000, 128???? ; 128 MB DRAM BANK 6

…………………………

DCD???? 0x00000000, 0x00000000,? 0????? ; end of table

?????? ]

那么上面語句的307到309行就是實現(xiàn) (r2)=0x80000000，(r3=0x30000000)和(r4=128)這些功能，而311行就是用于判斷在建立一級頁表是否完成，如果完成，也即cacheable地址0x80000000~0xa0000000這段虛擬內(nèi)存映射的物理內(nèi)存創(chuàng)建完畢，就跳到下面標號為40的地方開始執(zhí)行；如果沒有完成，會接下來執(zhí)行。

ldr?? r5, =0x1FF00000

and r2, r2, r5??????????? ? ; VA needs 512MB, 1MB aligned.??????????

因為是對0x80000000~0xa0000000這段虛擬內(nèi)存映射(512MB)，并且是要求1MB對齊的，所以需要用0x1FF00000來保證。

ldr?? r5, =0xFFF00000

and r3, r3, r5??????????? ? ; PA needs 4GB, 1MB aligned.

對PA物理地址進行4G對齊。

add r2, r10, r2, LSR #18

add r0, r0, r3??????????? ? ; (r0) = PTE for next physical page

獲取下一個物理頁的入口地址。

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35?? str?? r0, [r2], #4

?????? add r0, r0, #0x00100000 ; (r0) = PTE for next physical page

1M遞增,因為1<<18=256K,而每一個pte描述4k頁,所以最終描述256k*4k=1M地址空間

?????? sub? r4, r4, #1??????????? ? ; Decrement number of MB left

?????? cmp?????? r4, #0

?????? bne %b35???????????????? ; Map next MB

遍歷到該region結束

?????? bic? r0, r0, #0xF0000000?????? ; Clear Section Base Address Field

?????? bic? r0, r0, #0x0FF00000?????? ; Clear Section Base Address Field

清空r0中的地址信息

?????? b???? ?? %b30??????????????????? ; Get next element

繼續(xù)創(chuàng)建oemaddrtab_cfg.inc描述的下一region

??????

40?? tst?? r0, #8

?????? bic? r0, r0, #0x0C???? ?? ; clear cachable & bufferable bits in PTE

?????? add r10, r10, #0x0800???? ?? ; (r10) = ptr to 1st PTE for "unmapped uncached space"

?????? bne %b25???????????????? ; go setup PTEs for uncached space

?????? sub? r10, r10, #0x3000???? ?? ; (r10) = restore address of 1st level page table

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?????? ; 1. Setup mmu to map (VA == 0) to (PA == 0x30000000).

?????? ; 1-1. cached area.

?????? ldr?? r0, =PTs???????????? ; PTE entry for VA = 0

?????? ldr?? r1, =0x3000040E???? ; cache/buffer/rw, PA base == 0x30000000

?????? ;ldr? r1, =0x30000402????? ; cache/buffer/rw, PA base == 0x30000000

?????? str?? r1, [r0]

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?????? ; 1-2. uncached area.

?????? add r0, r0, #0x0800? ; PTE entry for VA = 0x0200.0000 , uncached

?????? ldr?? r1, =0x30000402????? ; uncache/unbuffer/rw, base == 0x30000000

?????? str?? r1, [r0]

??????

?????? ; Comment:

?????? ; The following loop is to direct map RAM VA == PA. i.e.

?????? ;?? VA == 0x30XXXXXX => PA == 0x30XXXXXX for S3C2400

?????? ; Fill in 8 entries to have a direct mapping for DRAM

?????? ;

?????? ldr?? r10, =PTs?????????? ?? ; restore address of 1st level page table

?????? ldr?? r0,? =PHYBASE

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?????? add r10, r10, #(0x3000 / 4) ; (r10) = ptr to 1st PTE for 0x30000000

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?????? add r0, r0, #0x1E???? ?? ; 1MB cachable bufferable

?????? orr?? r0, r0, #0x400??? ? ; set kernel r/w permission

?????? mov?????? r1, #0

?????? mov?????? r3, #64

45?? mov?????? r2, r1?????????? ? ; (r2) = virtual address to map Bank at

?????? cmp?????? r2, #0x20000000:SHR:BANK_SHIFT

?????? add r2, r10, r2, LSL #BANK_SHIFT-18

?????? strlo??? r0, [r2]

?????? add r0, r0, #0x00100000 ; (r0) = PTE for next physical page

?????? subs???? r3, r3, #1

?????? add r1, r1, #1

?????? bgt? %b45

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?????? ldr?? r10, =PTs?????????? ?? ; (r10) = restore address of 1st level page table

一級頁表的映射關系建立完成之后，要把一級頁表的基地址保存會r10中。

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; The page tables and exception vectors are setup.

?????? ; Initialize the MMU and turn it on.

?????? mov?????? r1, #1

?????? mcr p15, 0, r1, c3, c0, 0?? ; setup access to domain 0

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?????? mcr p15, 0, r10, c2, c0, 0

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?????? mcr p15, 0, r0, c8, c7, 0?? ; flush I+D TLBs

??????

?????? mrc???? p15,0,r1,c1,c0,0

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?????? orr?? r1, r1, #0x0071???????? ; Enable: MMU

?????? orr?? r1, r1, #0x0004? ; Enable the cache

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?????? ldr?? r0, =VirtualStart

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?????? cmp?????? r0, #0????????? ? ; make sure no stall on "mov pc,r0" below

?????? mcr p15, 0, r1, c1, c0, 0

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?????? mov?????? pc, r0????????? ? ;? & jump to new virtual address

?????? nop

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?????? ; MMU & caches now enabled.

?????? ;?? (r10) = physcial address of 1st level page table

?????? ;

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VirtualStart

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?????? mov?????? sp, #0x80000000????? ; have to be modefied. refer oemaddrtab_cfg.inc, DonGo

?????? add sp, sp, #0x30000????? ; arbitrary initial super-page stack pointer

注意0x80000000+0x30000=0x80030000，不能超過eboot/boot.bib中下面

MEMORY

;?? Name???? Start???? Size????? Type

;?? -------? --------? --------? ----

??? ARGS???? 80020800? 00000800? RESERVED

??? RAM????? 80021000? 0000B000? RAM???

??? STACK??? 8002c000? 0000A000? RESERVED

??? EBOOT??? 80038000? 00040000? RAMIMAGE

BINFS??? 80080000? 00021000? RESERVED

對stack中指定的值，也即0x8002c000+0x0000A000=0x80036000，其對應的物理地址是0x30036000，也即0x80000000+0x30000的值要在0x3002c000~0x30036000之間。

?????? b???? ?? main

到這里就跳轉到eboot的main函數(shù)了。

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??????? ENTRY_END

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