00. 目錄

文章目錄

• • 00. 目錄
  • 01. 概述
  • 02. 相關類型
  • 03. 相關函數
  • 04. 結構體封裝
  • 05. 預留
  • 06. 附錄
  • 07. 聲明

01. 概述

很多單片機都有低功耗模式，STM32F4 也不例外。在系統或電源復位以后，微控制器處于運行狀態。運行狀態下的 HCLK 為 CPU 提供時鐘，內核執行程序代碼。當 CPU 不需繼續運行時，可以利用多個低功耗模式來節省功耗，例如等待某個外部事件時。用戶需要根據最低電源消耗，最快速啟動時間和可用的喚醒源等條件，選定一個最佳的低功耗模式。

在stm32f4xx_pwr.c 和stm32f4xx_pwr.h 文件中。

02. 相關類型

PWR_PVD_detection_level

/** @defgroup PWR_PVD_detection_level * @{*/ #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0 #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1 #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2 #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3 #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4 #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5 #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6 #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))

PWR_Regulator_state_in_STOP_mode

/** @defgroup PWR_Regulator_state_in_STOP_mode * @{*/ #define PWR_MainRegulator_ON ((uint32_t)0x00000000) #define PWR_LowPowerRegulator_ON PWR_CR_LPDS/* --- PWR_Legacy ---*/ #define PWR_Regulator_ON PWR_MainRegulator_ON #define PWR_Regulator_LowPower PWR_LowPowerRegulator_ON#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MainRegulator_ON) || \((REGULATOR) == PWR_LowPowerRegulator_ON))

PWR_Regulator_state_in_UnderDrive_mode

/** @defgroup PWR_Regulator_state_in_UnderDrive_mode * @{*/ #define PWR_MainRegulator_UnderDrive_ON PWR_CR_MRUDS #define PWR_LowPowerRegulator_UnderDrive_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))#define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MainRegulator_UnderDrive_ON) || \((REGULATOR) == PWR_LowPowerRegulator_UnderDrive_ON))

PWR_STOP_mode_entry

/** @defgroup PWR_STOP_mode_entry * @{*/ #define PWR_STOPEntry_WFI ((uint8_t)0x01) #define PWR_STOPEntry_WFE ((uint8_t)0x02) #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))

PWR_Regulator_Voltage_Scale

/** @defgroup PWR_Regulator_Voltage_Scale * @{*/ #define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x0000C000) #define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00008000) #define PWR_Regulator_Voltage_Scale3 ((uint32_t)0x00004000) #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \((VOLTAGE) == PWR_Regulator_Voltage_Scale3))

PWR_Flag

/** @defgroup PWR_Flag * @{*/ #define PWR_FLAG_WU PWR_CSR_WUF #define PWR_FLAG_SB PWR_CSR_SBF #define PWR_FLAG_PVDO PWR_CSR_PVDO #define PWR_FLAG_BRR PWR_CSR_BRR #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY #define PWR_FLAG_ODRDY PWR_CSR_ODRDY #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY/* --- FLAG Legacy ---*/ #define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \((FLAG) == PWR_FLAG_VOSRDY) || ((FLAG) == PWR_FLAG_ODRDY) || \((FLAG) == PWR_FLAG_ODSWRDY) || ((FLAG) == PWR_FLAG_UDRDY))#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \((FLAG) == PWR_FLAG_UDRDY))

03. 相關函數

/* Function used to set the PWR configuration to the default reset state ******/ void PWR_DeInit(void);/* Backup Domain Access function **********************************************/ void PWR_BackupAccessCmd(FunctionalState NewState);/* PVD configuration functions ************************************************/ void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); void PWR_PVDCmd(FunctionalState NewState);void PWR_WakeUpPinCmd(FunctionalState NewState);/* Main and Backup Regulators configuration functions *************************/ void PWR_BackupRegulatorCmd(FunctionalState NewState); void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage); void PWR_OverDriveCmd(FunctionalState NewState); void PWR_OverDriveSWCmd(FunctionalState NewState); void PWR_UnderDriveCmd(FunctionalState NewState);/* FLASH Power Down configuration functions ***********************************/ void PWR_FlashPowerDownCmd(FunctionalState NewState);/* Low Power modes configuration functions ************************************/ void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); void PWR_EnterUnderDriveSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); void PWR_EnterSTANDBYMode(void);/* Flags management functions *************************************************/ FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); void PWR_ClearFlag(uint32_t PWR_FLAG);

04. 結構體封裝

/** * @brief Power Control*/typedef struct {__IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ } PWR_TypeDef;

05. 預留

06. 附錄

6.1 【STM32】STM32系列教程匯總

網址：【STM32】STM32系列教程匯總

07. 聲明

該教程參考了正點原子的《STM32 F4 開發指南》

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